1. Technical Field
The present invention relates to a method for manufacturing a semiconductor substrate and a method for manufacturing a semiconductor device. In particular, the invention relates to a technology to form a silicon-on-insulator (SOI) structure on a semiconductor substrate.
2. Related Art
Currently, development of SOI technology is carried out actively in the field of semiconductor manufacturing in order to provide integrated circuits with lower power consumption. Devices using an SOI substrate are known for providing characteristics allowing higher speed than those of devices in related art and low power consumption. This is because the devices can greatly reduce parasitic capacitance of transistors.
On the other hand, cost of the substrate is very high since special equipment is required in SIMOX method, a bonding method and so on for manufacturing the SOI substrate. The cost is normally 5 to 10 times more than that of a bulk substrate. Further, devices using the SOI structure have some disadvantages such as reduction of drain breakdown voltage and electrostatic discharge immunity level due to the special structure. In order to solve these problems, methods to form the SOI structure partially on a bulk substrate have been proposed.
One of the methods proposed as above is, as disclosed in Separation by Bonding Si islands (SBSI) for LSI Applications. (T. Sakai et al.), Second International SiGe Technology and Device Meeting Abstract, pp. 230-231, May (2004), SBSI technology. The SBSI technology is applicable to an existing production line for semiconductors in related art. Besides, the technology provides an SOI device that can economically provide high performance by forming the SOI structure exclusively in a region required on a bulk substrate.
Now the details of the manufacturing method will be addressed. First of all, a silicon germanium (SiGe) layer and a silicon (Si) layer are formed on a Si substrate by epitaxial growth. Next, a hollow portion for a support member is formed in the Si layer and the SiGe layer. After a silicon oxide (SiO2) film or a silicon nitride (Si3N4) film is formed as the support member, the support member is dry etched to form a shape of an element region. Sequentially, the Si layer and the SiGe layer are also dry etched. When the SiGe layer is selectively etched with hydrofluoric-nitric acid in this state, a cavity is formed under the Si layer hanging on to the support member. Thereafter, the cavity is embedded with a SiO2 film by thermal oxidation so as to complete an SOI structure.
In the method using the SBSI technology above, it is confirmed that a Ge residue remains on the surface of the Si film after the SiGe layer is selectively etched. Then, when the Si substrate is oxidized after the SiGe layer is selectively etched, Ge in the SiO2 film tends to gather at an interface between the SiO2 film and the Si film (hereinafter, referred to as the SiO2/Si interface) moving as if extruded from the inside of the SiO2 film to the Si side.
The inventor of the present invention focused attention to such concentration of Ge at the SiO2/Si interface and performed various experiments. From the results of the experiments, the inventor has uncovered the fact that device characteristics are easily deteriorated when a Si substrate is thermally oxidized with a Ge residue remaining in its cavity.
The results of the experiments are shown in FIGS. 7 through 10. The experiments used wafers in which Ge was adsorbed intentionally (hereinafter referred to as Ge adsorbed wafers) as samples in substitution for Si substrates with a Ge residue.
FIG. 7 is a chart showing amounts of Ge adsorption on the surface of the wafers v. the flow time of GeH4 gas with an epitaxial chemical vapor deposition (CVD) reactor. The horizontal axis in FIG. 7 shows the flow time of GeH4 gas (time for supply) by the epitaxial reactor in which the wafers are loaded. The vertical axis shows amounts of Ge adsorption (Ge density) on the surface of the wafers. In this experiment, the wafers were silicon, and two different degrees of temperature such as 400 and 450 degrees centigrade were set. As shown in FIG. 7, with the epitaxial reactor, the longer the GeH4 gas was flowed and also the higher the temperature of the wafer was, the more Ge adsorbed to the surface.
FIG. 8 is a chart showing the thickness of a SiO2 film against Ge density of the sample wafers. The SiO2 film was formed on the sample wafers by treating Ge adsorbed wafers at 1000 degrees centigrade with O2 for one hour. The horizontal axis in FIG. 8 shows amounts of Ge adsorption (Ge density) on the surface of the wafers. The vertical axis shows the thickness of the SiO2 film formed on the surface of the wafers by the treatment above. The dotted line in FIG. 8 shows the thickness of the SiO2 film formed on the surface of a Ge non-adsorbed wafer as a reference. As shown in FIG. 8, SiO2 was formed thicker when Ge adsorbed to the surface of the wafer, and the thickness of the SiO2 film formed increased as Ge density grew.
The result shows that a large Ge residue adsorbed onto the cavity remaining after the selective etching of the SiGe layer makes the SiO2 film thicker than the target. Accordingly, the SOI body may become thinner for the extent of the excessive thickness of the SiO2 film.
FIG. 9 is a chart showing a lifetime of the Si surface against Ge density of sample wafers. The SiO2 film was formed on the sample wafers by treating Ge adsorbed wafers at 1000 degrees centigrade with O2 for one hour. The horizontal axis in FIG. 9 shows amounts of Ge adsorption (Ge density) on the surface of the wafers. The vertical axis shows the lifetime of the Si surface after the treatment above. The dotted line in FIG. 9 shows the lifetime of a Si surface of a Ge non-adsorbed wafer as a reference after the treatment above. As shown in FIG. 9, the lifetime of the Si surface increased (i.e. defects increased) as the Ge density on the surface of the wafer went over 1013 cm2.
FIG. 10 is a chart showing a SiO2/Si interface state density against Ge density of sample wafers. The SiO2 film was formed on the sample wafers by treating Ge adsorbed wafers at 1000 degrees centigrade with O2 for one hour. The horizontal axis in FIG. 10 shows amounts of Ge adsorption (Ge density) on the surface of the wafers. The vertical axis shows the SiO2/Si interface state density after the treatment above. As shown in FIG. 10, the SiO2/Si interface state density increased as the Ge density on the surface of the wafer went over 1013 cm−2.
As shown in FIGS. 9 and 10, there is a risk that device characteristics are deteriorated if values of the lifetime and the interface state density are high. For example, an increase of leakage current, deterioration of mobility, an increase of noise and a decrease of insulating breakdown voltage may occur.